ENERGY-EFFICIENT APPROXIMATE MULTIPLIERS FOR ENHANCED IMAGE PROCESSING APPLICATIONS
Keywords:
ApproximateComputation,WallaceMultiplier,3:2Compressor,LowPower, PDPAbstract
The primary objective of this investigation is to create two distinct multipliers, each consisting of approximately 88 components, that utilize compressors with compression ratios of approximately 2:1 and 3:1. Based on the Wallace multiplier principle, approximation Wallace multipliers (AWMs) are multipliers. Utilizing a variety of design metrics (DMs), the efficacy of the proposed AWMs was investigated and evaluated. PDP, latency, voltage, and area were among the items. The efficiency of asynchronous waveform matching (AWM) was investigated by the researchers using six multipliers, all of which were based on prominent 3:2 compressors. Cadence's RTL Compiler (RC) tool and a normal or 180 nm-optimized cell library, which were based on the Verilog design, were employed to generate each multiplier. The findings indicate that the effective treatment of AWMs and DMs can be achieved by combining them. This study examined a vast array of approximation compressors in order to ascertain a variety of image processing algorithms. Other Wallace multipliers were matched with AWMs (approximate Wallace Multipliers) using the Peak Signal-to-Noise Ratio (PSNR). The experimental peak signal-to-noise ratio of the recommended multipliers exceeds 50 dB.